Datasheet

19.11.13 Output Compare Register 3 A Low and High byte

Name: OCR3AL and OCR3AH

Offset: 0x98

Reset: 0x00

Property: -

The OCR3AL and OCR3AH register pair represents the 16-bit value, OCR3A. The low byte [7:0] (suffix L)

is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For

more details on reading and writing 16-bit registers, refer to Accessing 16-bit Timer/Counter Registers.

Bit 15 14 13 12 11 10 9 8

OCR3A[15:8]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0

OCR3A[7:0]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bits 15:0 – OCR3A[15:0] Output Compare 3 A

The Output Compare Registers contain a 16-bit value that is continuously compared with the counter

value (TCNT3). A match can be used to generate an Output Compare interrupt or to generate a

waveform output on the OC3A pin.

The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are written

simultaneously when the CPU writes to these registers, the access is performed using an 8-bit temporary

High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. Refer to

Accessing 16-bit Timer/Counter Registers for details.