Datasheet

19.11.12 Input Capture Register 3 Low and High byte

Name: ICR3L and ICR3H

Offset: 0x96

Reset: 0x00

Property: -

The ICR3L and ICR3H register pair represents the 16-bit value, ICR3. The low byte [7:0] (suffix L) is

accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For

more details on reading and writing 16-bit registers, refer to Accessing 16-bit Timer/Counter Registers.

Bit 15 14 13 12 11 10 9 8

ICR3[15:8]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bit 7 6 5 4 3 2 1 0

ICR3[7:0]

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 0 0 0 0 0 0 0 0

Bits 15:0 – ICR3[15:0] Input Capture 3

The Input Capture is updated with the counter (TCNT3) value each time an event occurs on the ICP3 pin

(or optionally on the Analog Comparator output for Timer/Counter3). The Input Capture can be used for

defining the counter TOP value.

The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read

simultaneously when the CPU accesses these registers, the access is performed using an 8-bit

temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers.

Refer to Accessing 16-bit Timer/Counter Registers for details.