Datasheet

Figure 19-5. CTC Mode, Timing Diagram
TCNTn
OCnA
(Toggle)
OCnA Interrupt Flag Set
or ICFn Interrupt Flag Set
(Interrupt on TOP)
1 4
Period
2 3
(COMnA[1:0] = 0x1)
Note: The “n” in the register and bit names indicates the device number (n = 1, 3, 4 for Timer/Counter 1,
3, 4), and the “x” indicates output compare unit (A/B).
An interrupt can be generated at each time the counter value reaches the TOP value by either using the
OCFnA or ICFn flag, depending on the actual CTC mode. If the interrupt is enabled, the interrupt handler
routine can be used for updating the TOP value.
Note: Changing TOP to a value close to BOTTOM while the counter is running must be done with care
since the CTC mode does not provide double buffering. If the new value written to OCRnA is lower than
the current value of TCNTn, the counter will miss the compare match. The counter will then count to its
maximum value (0xFF for an 8-bit counter, 0xFFFF for a 16-bit counter) and wrap around starting at 0x00
before the compare match will occur.
In many cases, this feature is not desirable. An alternative will then be to use the Fast PWM mode using
OCRnA for defining TOP (WGMn[3:0]=0xF), since the OCRnA then will be double buffered.
For generating a waveform output in CTC mode, the OCnA output can be set to toggle its logical level on
each compare match by setting the Compare Output mode bits to toggle mode (COMnA[1:0]=0x1). The
OCnA value will not be visible on the port pin unless the data direction for the pin is set to output
(DDR_OCnA=1). The waveform generated will have a maximum frequency of f
OCnA
= f
clk_I/O
/2 when
OCRnA is set to ZERO (0x0000). The waveform frequency is defined by the following equation:

OCnA
=

clk_I/O
2   
1 + OCRnA
Note:
• The “n” indicates the device number (n = 1, 3, 4 for Timer/Counter 1, 3, 4), and the “x” indicates
Output Compare unit (A/B).
• N represents the prescaler factor (1, 8, 64, 256, or 1024).
As for the Normal mode of operation, the Timer Counter TOV flag is set in the same timer clock cycle that
the counter counts from MAX to 0x0000.
19.9.3 Fast PWM Mode
The Fast Pulse Width Modulation or Fast PWM modes (modes 5, 6, 7, 14, and 15, WGMn[3:0]= 0x5, 0x6,
0x7, 0xE, 0xF) provide a high frequency PWM waveform generation option. The Fast PWM differs from
the other PWM options by its single-slope operation. The counter counts from BOTTOM to TOP then
restarts from BOTTOM.
ATmega328PB
TC1, 3, 4 - 16-bit Timer/Counter1, 3, 4 with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 169