Datasheet

Figure 19-2. Input Capture Unit Block Diagram for TCn
ICFn (Int.Req.)
Analog
Comparator
WRITE
ICRn (16-bit Register)
ICRnH (8-bit)
Noise
Canceler
ICPn
Edge
Detector
TEMP (8-bit)
DATA BUS (8-bit)
ICRnL (8-bit)
TCNTn (16-bit Counter)
TCNTnH (8-bit) TCNTnL (8-bit)
ACIC ICNC ICES
ACO
Note: The “n” in the register and bit names indicates the device number (n = 1, 3, 4 for Timer/Counter 1,
3, 4), and the “x” indicates output compare unit (A/B).
When a change of the logic level (an event) occurs on the input capture pin (ICPn), or alternatively on the
Analog Comparator Output (ACO), and this change confirms to the setting of the edge detector, a capture
will be triggered: the 16-bit value of the counter (TCNTn) is written to the Input Capture Register (ICRn).
The Input Capture Flag (ICF) is set at the same system clock cycle as the TCNTn value is copied into the
ICRn . If enabled (TIMSKn.ICIE=1), the Input capture flag generates an input capture interrupt. The ICFn
is automatically cleared when the interrupt is executed. Alternatively, the ICF can be cleared by software
by writing '1' to its I/O bit location.
Reading the 16-bit value in the ICRn is done by first reading the low byte (ICRnL) and then the high byte
(ICRnH). When the low byte is read form ICRnL, the high byte is copied into the high byte temporary
register (TEMP). When the CPU reads the ICRnH I/O location it will access the TEMP register.
The ICRn can only be written when using a Waveform Generation mode that utilizes the ICRn for defining
the counter’s TOP value. In these cases the Waveform Generation mode bits (WGMn[3:0]) must be set
before the TOP value can be written to the ICRn. When writing the ICRn, the high byte must be written to
the ICRnH I/O location before the low byte is written to ICRnL.
19.6.1 Input Capture Trigger Source
The main trigger source for the input capture unit is the Input Capture pin (ICPn). Timer/Countern can
alternatively use the analog comparator output as trigger source for the input capture unit. The analog
comparator is selected as a trigger source by setting the Analog Comparator Input Capture (ACIC) bit in
the Analog Comparator Control and Status Register (ACSR). Be aware that changing trigger source can
trigger a capture. The input capture flag must, therefore, be cleared after the change.
ATmega328PB
TC1, 3, 4 - 16-bit Timer/Counter1, 3, 4 with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 164