Datasheet

Table 17-4. Overriding Signals for Alternate Functions in PB7...PB4
Signal
Name
PB7/XTAL2/TOSC2/
PCINT7
(1)
PB6/XTAL1/TOSC1/
PCINT6
(1)
PB5/SCK0/XCK0/
PCINT5
PB4/MISO0/RXD1/
PCINT4
PUOE INTRC • EXTCK+ AS2 INTRC + AS2 SPE0 • MSTR SPE0 • MSTR + RXEN1
PUOV 0 0 PORTB5 • PUD PORTB4 • PUD
DDOE INTRC • EXTCK+ AS2 INTRC + AS2 SPE0 • MSTR SPE0 • MSTR + RXEN1
DDOV 0 0 0 0
PVOE 0 0 SPE0 • MSTR SPE0 • MSTR
PVOV 0 0 SCK0 OUTPUT SPI0 SLAVE
OUTPUT
DIEOE INTRC • EXTCK + AS2 +
PCINT7 • PCIE0
INTRC + AS2 + PCINT6
• PCIE0
PCINT5 • PCIE0 PCINT4 • PCIE0
DIEOV (INTRC + EXTCK) • AS2 INTRC • AS2 1 1
DI PCINT7 INPUT PCINT6 INPUT
PCINT5 INPUT
SCK0 INPUT
PCINT4 INPUT
SPI0 MSTR INPUT
RXD1
AIO Oscillator Output Oscillator/Clock Input – –
Notes: 1. INTRC means that one of the internal RC Oscillators are selected (by the CKSEL fuses),
EXTCK means that external clock is selected (by the CKSEL fuses).
Table 17-5. Overriding Signals for Alternate Functions in PB3...PB0
Signal
Name
PB3/MOSI0/TXD1/OC2A/PCINT3 PB2/SS0/OC1B/PCINT2 PB1/OC1A/PCINT1 PB0/ICP1/CLKO/
PCINT0
PUOE SPE0 • MSTR + TXEN1 SPE0 • MSTR 0 0
PUOV PORTB3 • PUD PORTB2 • PUD 0 0
DDOE SPE0 • MSTR + TXEN1 SPE0 • MSTR 0 0
DDOV 0 0 0 0
PVOE SPE0 • MSTR + OC2A ENABLE OC1B ENABLE OC1A ENABLE 0
PVOV SPI0 MSTR OUTPUT + OC2A +
TXD1
OC1B OC1A 0
DIEOE PCINT3 • PCIE0 PCINT2 • PCIE0 PCINT1 • PCIE0 PCINT0 • PCIE0
DIEOV 1 1 1 1
DI
PCINT3 INPUT
SPI0 SLAVE INPUT
PCINT2 INPUT
SPI0 SS
PCINT1 INPUT
PCINT0 INPUT
ICP1 INPUT
AIO – – – –
ATmega328PB
I/O-Ports
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40001906C-page 109