Datasheet

ATmega48A/PA/88A/PA/168A/PA/328/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002061A-page 622
(0xBD) TWAMR TWAM6 TWAM5 TWAM4 TWAM3 TWAM2 TWAM1 TWAM0 –242
(0xBC) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN
–TWIE 239
(0xBB) TWDR 2-wire Serial Interface Data Register 241
(0xBA) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 241
(0xB9) TWSR TWS7 TWS6 TWS5 TWS4 TWS3 –TWPS1TWPS0 240
(0xB8) TWBR 2-wire Serial Interface Bit Rate Register 239
(0xB7) Reserved
– – – – – – –
(0xB6) ASSR
– EXCLK AS2 TCN2UB OCR2AUB OCR2BUB TCR2AUB TCR2BUB 167
(0xB5) Reserved – – – – – – – –
(0xB4) OCR2B Timer/Counter2 Output Compare Register B 166
(0xB3) OCR2A Timer/Counter2 Output Compare Register A 166
(0xB2) TCNT2 Timer/Counter2 (8-bit) 166
(0xB1) TCCR2B FOC2A FOC2B
– – WGM22 CS22 CS21 CS20
165
(0xB0) TCCR2A COM2A1 COM2A0 COM2B1 COM2B0 – –WGM21WGM20 162
(0xAF) Reserved
– – – – – – – –
(0xAE) Reserved
– – – – – – – –
(0xAD) Reserved – – – – – – – –
(0xAC) Reserved
– – – – – – – –
(0xAB) Reserved
– – – – – – – –
(0xAA) Reserved – – – – – – – –
(0xA9) Reserved
– – – – – – – –
(0xA8) Reserved
– – – – – – – –
(0xA7) Reserved
– – – – – – – –
(0xA6) Reserved – – – – – – – –
(0xA5) Reserved
– – – – – – – –
(0xA4) Reserved
– – – – – – – –
(0xA3) Reserved – – – – – – – –
(0xA2) Reserved
– – – – – – – –
(0xA1) Reserved
– – – – – – – –
(0xA0) Reserved – – – – – – – –
(0x9F) Reserved
– – – – – – – –
(0x9E) Reserved
– – – – – – – –
(0x9D) Reserved – – – – – – – –
(0x9C) Reserved
– – – – – – – –
(0x9B) Reserved
– – – – – – – –
(0x9A) Reserved – – – – – – – –
(0x99) Reserved
– – – – – – – –
(0x98) Reserved
– – – – – – – –
(0x97) Reserved – – – – – – – –
(0x96) Reserved
– – – – – – – –
(0x95) Reserved
– – – – – – – –
(0x94) Reserved – – – – – – – –
(0x93) Reserved
– – – – – – – –
(0x92) Reserved
– – – – – – – –
(0x91) Reserved
– – – – – – – –
(0x90) Reserved – – – – – – – –
(0x8F) Reserved – – – – – – – –
(0x8E) Reserved – – – – – – – –
(0x8D) Reserved – – – – – – – –
(0x8C) Reserved – – – – – – – –
(0x8B) OCR1BH Timer/Counter1 - Output Compare Register B High Byte 144
(0x8A) OCR1BL Timer/Counter1 - Output Compare Register B Low Byte 144
(0x89) OCR1AH Timer/Counter1 - Output Compare Register A High Byte 144
(0x88) OCR1AL Timer/Counter1 - Output Compare Register A Low Byte 144
(0x87) ICR1H Timer/Counter1 - Input Capture Register High Byte 144
(0x86) ICR1L Timer/Counter1 - Input Capture Register Low Byte 144
(0x85) TCNT1H Timer/Counter1 - Counter Register High Byte 143
(0x84) TCNT1L Timer/Counter1 - Counter Register Low Byte 143
(0x83) Reserved – – – – – – – –
(0x82) TCCR1C FOC1A FOC1B – – – – – –143
(0x81) TCCR1B ICNC1 ICES1 – WGM13 WGM12 CS12 CS11 CS10 142
(0x80) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 – –WGM11WGM10 140
(0x7F) DIDR1 – – – – – – AIN1D AIN0D 245
(0x7E) DIDR0 – – ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 260
(0x7D) Reserved – – – – – – – –
(0x7C) ADMUX REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0 257
(0x7B) ADCSRB –ACME – – – ADTS2 ADTS1 ADTS0 260
(0x7A) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 258
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page