Datasheet
ATmega48A/PA/88A/PA/168A/PA/328/P
2018 Microchip Technology Inc. Data Sheet Complete DS40002061A-page 139
Figure 16-12. Timer/Counter Timing Diagram, no Prescaling.
Figure 16-13 shows the same timing data, but with the prescaler enabled.
Figure 16-13. Timer/Counter Timing Diagram, with Prescaler (f
clk_I/O
/8)
TOVn (FPWM)
and ICFn (if used
as TOP)
OCRnx
(Update at TOP)
TCNTn
(CTC and FPWM)
TCNTn
(PC and PFC PWM)
TOP - 1 TOP TOP - 1 TOP - 2
Old OCRnx Value
New OCRnx Value
TOP - 1 TOP BOTTOM BOTTOM + 1
clk
Tn
(clk
I/O
/1)
clk
I/O
TOVn (FPWM)
and ICFn (if used
as TOP)
OCRnx
(Update at TOP)
TCNTn
(CTC and FPWM)
TCNTn
(PC and PFC PWM)
TOP - 1
TOP TOP - 1 TOP - 2
Old OCRnx Value New OCRnx Value
TOP - 1 TOP BOTTOM BOTTOM + 1
clk
I/O
clk
Tn
(clk
I/O
/8)