Datasheet

ATmega48A/PA/88A/PA/168A/PA/328/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002061A-page 53
10.11 Register Description
10.11.1 SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits [7:4]: Reserved
These bits are unused in the ATmega48A/PA/88A/PA/168A/PA/328/P, and will always be read as zero.
• Bits 3:1 – SM[2:0]: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in Table 10-2.
Note: 1. Standby mode is only recommended for use with external crystals or resonators.
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is
executed. To avoid the MCU entering the sleep mode unless it is the programmer’s purpose, it is recommended
to write the Sleep Enable (SE) bit to one just before the execution of the SLEEP instruction and to clear it
immediately after waking up.
Bit 76543210
0x33 (0x53)
––––SM2SM1SM0SESMCR
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 10-2. Sleep Mode Select
SM2 SM1 SM0 Sleep Mode
0 0 0 Idle
0 0 1 ADC Noise Reduction
0 1 0 Power-down
0 1 1 Power-save
1 0 0 Reserved
1 0 1 Reserved
1 1 0 Standby
(1)
1 1 1 External Standby
(1)