Datasheet

ATmega48A/PA/88A/PA/168A/PA/328/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002061A-page 204
20.11.5 UBRRnL and UBRRnH – USART Baud Rate Registers
• Bit 15:12 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bit must be written to zero
when UBRRnH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four most significant
bits, and the UBRRnL contains the eight least significant bits of the USART baud rate. Ongoing transmissions
by the Transmitter and Receiver will be corrupted if the baud rate is changed. Writing UBRRnL will trigger an
immediate update of the baud rate prescaler.
Table 20-12. UCPOLn Bit Settings
UCPOLn
Transmitted Data Changed (Output of
TxDn Pin)
Received Data Sampled (Input on RxDn
Pin)
0 Rising XCKn Edge Falling XCKn Edge
1 Falling XCKn Edge Rising XCKn Edge
Bit 151413121110 9 8
–––– UBRRn[11:8] UBRRnH
UBRRn[7:0] UBRRnL
76543210
Read/WriteRRRRR/WR/WR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
00000000