Datasheet

ATmega48PB/88PB/168PB
AVR Microcontroller with Core Independent Peripherals
and PicoPower technology
Introduction
ATmega48PB/88PB/168PB is a low-power CMOS 8-bit microcontroller based on the AVR
®
enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48PB/88PB/
168PB achieves throughputs approaching 1MIPS/MHz, allowing the system designer to optimize power
consumption versus processing speed.
Features
Advanced RISC architecture
131 instructions – most single clock cycle execution
32 x 8 general purpose working registers
Fully static operation
Up to 20MIPS throughput at 20MHz
On-chip 2-cycle Multiplier
High endurance non-volatile memory segments
4/8/16KBytes of in-system self-programmable Flash program memory
256/512/512Bytes EEPROM
512/1K/1KBytes internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data retention: 20 years at 85°C/100 years at 25°C
Optional boot code section with independent lock bits
In-system programming by on-chip boot program
True Read-While-Write (RWW) operation
Programming lock for software security
QTouch
®
library support
Capacitive touch buttons, sliders and wheels
QTouch and QMatrix
®
acquisition
Up to 64 sense channels
Peripheral Features
Two 8-bit Timer/Counters (TC) with separate prescaler and compare mode
16-bit Timer/Counter with separate prescaler, compare mode, and capture mode
Real Time Counter (RTC) with separate oscillator
Six Pulse Width Modulation (PWM) channels
8-channel 10-bit Analog-to-Digital converter (ADC) with temperature measurement
Programmable serial USART with start-of-frame detection
This is a summary document. A
complete document is available on
our Web site at www.microchip.com
© 2017 Microchip Technology Inc.
Datasheet Summary
DS40001910A-page 1

Summary of content (32 pages)