Datasheet

• JTAG (IEEE std. 1149.1 Compliant) Interface

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

• Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– Two 16-bit Timer/Counters with Separate Prescaler, Compare Mode, and Capture Mode

– Real Time Counter with Separate Oscillator

– Eight PWM Channels

– 8-channel 10-bit ADC

• Differential Mode with Selectable Gain at 1×, 10× or 200×

– One Byte-oriented 2-wire Serial Interface (Philips I

C compatible)

– Two Programmable Serial USART

– One Master/Slave SPI Serial Interface

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

• Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated RC Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and

Extended Standby

• I/O and Packages

– 32 Programmable I/O Lines

– 40-pin PDIP

– 44-lead TQFP

– 44-pad VQFN/QFN

• Operating Voltage:

– 1.8 - 5.5V

• Speed Grades

– 0 - 4MHz @ 1.8V - 5.5V

– 0 - 10MHz @ 2.7V - 5.5V

– 0 - 20MHz @ 4.5 - 5.5V

• Power Consumption at 1MHz, 1.8V, 25°C

– Active Mode: 0.4mA

– Power-down Mode: 0.1μA

– Power-save Mode: 0.6μA (Including 32kHz RTC)

Note:

1. Refer to Data Retention