Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 658
37.4 Rev. 8272E - 04/2013
37.5 Rev. 8272D - 05/12
37.6 Rev. 8272C - 06/11
37.7 Rev. 8272B - 05/11
1. Updated Figure 1-1 on page 11 and Figure 2-1 on page 14: T3 and T/C3 only available in ATmega1284/1284P.
2.
Updated descriptive text on page 6 to indicate that ATmega1284/1284P has four T/Cs.
3. Updated the Assembly code example for WDT_off (p.56) following the ej# 705736.
4. Added note in ”16-bit Timer/Counter1 and Timer/Counter3(1) with PWM” on page 115.
5. Added ”Prescaler Reset” on page 120.
6. Corrected three typo for Waveform generation mode (WGM) instead of MGM.
7.
Updated Table 23-6 on page 261. ADC Auto Trigger Source Selections, ADTS=0b011, the statement is
Timer/Counter0 Compare Match A.
8. Updated Table 27-18 on page 318. Command for 6d Poll for Fuse Write Complete: 0111011_00000000
9. Updated the table notes of the Table 28-1 on page 326.
10. Updated ”Register summary” on page 636. Added table note 7: Only available in ATmega1284/1284P.
1. Updated ”Power-down mode” on page 52.
2. Updated ”Overview” on page 75.
3.
Corrected references for Bit 2, Bit 1, and Bit 0 in Section ”UCSRnC – USART MSPIM Control and Status Register
n C” on page 209.
4. Several small corrections throughout the whole document made according to the template
5. Notes in Table 27-17 on page 312 have been corrected
6. Note (1) in Table 28-3 on page 328 is added
1. Updated ”ATmega1284P DC characteristics” on page 331.
1. Added Atmel QTouch Library Support and QTouch Sensing Capability Features.
2. Replaced the Figure 1-1 on page 11 by an updated “Pinout” that includes Timer/Counter3.
3.
Replaced the Figure 7-1 on page 18 by an updated “Block diagram of the AVR architecture” that includes
Timer/Counter3.
4. Added ”RAMPZ – Extended Z-pointer Register for ELPM/SPM(1)” on page 23.
5. Added ”PRR1 – Power Reduction Register 1” on page 57.
6. Renamed PRR to ”PRR0 – Power Reduction Register 0” on page 56.
7. Updated ”PCIFR – Pin Change Interrupt Flag Register” on page 77. PCICR replaces EIMSR in the PCIF3, PCIF2,
PCIF1 and PCIF0 bit description.
8. Updated ”PCMSK3 – Pin Change Mask Register 3” on page 78. PCIE3 replaces PCIE2 in the bit description.
9. Updated ”Alternate Functions of Port B” on page 88 to include Timer/Counter3