Datasheet
ATmega164A/PA/324A/PA/644A/PA/1284/P
2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 50
10. Power management and sleep modes
10.1 Overview
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power. The AVR
provides various sleep modes allowing the user to tailor the power consumption to the application’s
requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during the sleep
periods. To further save power, it is possible to disable the BOD in some sleep modes. See ”BOD disable(1)” on
page 51 for more details.
10.2 Sleep Modes
Figure 9-1 on page 38 presents the different clock systems in the
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P, and their distribution. The figure is helpful in
selecting an appropriate sleep mode. Table 10-1 shows the different sleep modes, their wake up sources and
BOD disable ability.
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP instruction must
be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which sleep mode will be activated by
the SLEEP instruction. See Table 10-2 on page 55 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for
four cycles in addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes
up from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Table 10-1. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Active Clock Domains Oscillators Wake-up Sources
Software
BOD Disdable
Sleep Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
Main Clock
Source
Timer Osc
Enabled
INT2:0 and
TWI Address
Timer2
SPM/
ADC
WDT Interrupt
Other I/O
Idle X X X X X
(2)
X X X X X X X
ADCNRM X X X X
(2)
X X
X
(
2)
X X X
Power-down X X X X
Power-save X X
(2)
X X X X X
Standby
(1)
X X X X X
Extended
Standby
X
(
2)
X X
(2)
X X X X X