Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P

 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 46

9.8 External clock

To drive the device from an external clock source, XTAL1 should be driven as shown in Figure 9-4. To run the

device on an external clock, the CKSEL Fuses must be programmed to “0000”.

Figure 9-4. External clock drive configuration

When this clock source is selected, start-up times are determined by the SUT Fuses as shown in Table 9-15.

When applying an external clock, it is required to avoid sudden changes in the applied clock frequency to

ensure stable operation of the MCU. A variation in frequency of more than 2% from one clock cycle to the next

can lead to unpredictable behavior. If changes of more than 2% is required, ensure that the MCU is kept in

Reset during the changes.

Note that the System Clock Prescaler can be used to implement run-time changes of the internal clock

frequency while still ensuring stable operation. Refer to ”System Clock Prescaler” on page 47 for details.

9.9 Timer/Counter Oscillator

ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P uses the same type of crystal oscillator for Low-

frequency Crystal Oscillator and Timer/Counter Oscillator. See ”Low Frequency Crystal Oscillator” on page 43

for details on the oscillator and crystal requirements.

The device can operate its Timer/Counter2 from an external 32.768kHz watch crystal or a external clock source.

See ”Clock source connections” on page 40 for details.

Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is written to logic

one. See ”The Output Compare Register B contains an 8-bit value that is continuously compared with the

counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to generate a

Table 9-14. Crystal oscillator clock frequency

Nominal frequency CKSEL3..0

0 - 20MHz 0000

Table 9-15. Start-up rimes for the external clock selection

Power conditions

Start-up time from power-

down and power-save

Additional delay from

reset (V

= 5.0V) SUT1..0

BOD enabled 6CK 14CK 00

Fast rising power 6CK 14CK + 4.1ms 01

Slowly rising power 6CK 14CK + 65ms 10

Reserved 11

EXTERNAL

CLOCK

SIGNAL

XTAL2

XTAL1

GND