Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 336
Figure 28-4. SPI interface timing requirements (Slave mode)
28.7 Two-wire Serial Interface Characteristics
Table 28-16 describes the requirements for devices connected to the two-wire Serial Bus. The
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P two-wire Serial Interface meets or exceeds these require-
ments under the noted conditions.
Timing symbols refer to Figure 28-5.
MISO
(Data Output)
SCK
(CPOL = 1)
MOSI
(Data Input)
SCK
(CPOL = 0)
SS
MSB LSB
LSBMSB
...
...
10
11 11
1213 14
17
15
9
X
16
Table 28-16. two-wire serial bus requirements
Symbol Parameter Condition Min. Max. Units
V
IL
Input Low-voltage -0.5 0.3V
CC
V
V
IH
Input High-voltage 0.7 V
CC
V
CC
+ 0.5
V
hys
(1)
Hysteresis of Schmitt Trigger Inputs 0.05 V
CC
(2)
–
V
OL
(1)
Output Low-voltage 3mA sink current 0 0.4
t
r
(1)
Rise Time for both SDA and SCL 20 + 0.1C
b
(2)(3)
300
nst
of
(1)
Output Fall Time from V
IHmin
to V
ILmax
10pF < C
b
< 400pF
(3)
20 + 0.1C
b
(2)(3)
250
t
SP
(1)
Spikes Suppressed by Input Filter 0 50
(2)
I
i
Input Current each I/O Pin 0.1V
CC
< V
i
< 0.9V
CC
-10 10 µA
C
i
(1)
Capacitance for each I/O Pin – 10 pF
f
SCL
SCL Clock Frequency f
CK
(4)
> max(16f
SCL
, 250kHz)
(5)
0 400 kHz
Rp Value of Pull-up resistor
f
SCL
 100kHz
f
SCL
> 100kHz
t
HD;STA
Hold Time (repeated) START
Condition
f
SCL
 100kHz 4.0 –
µs
f
SCL
> 100kHz 0.6 –
t
LOW
Low Period of the SCL Clock
f
SCL
 100kHz 4.7 –
f
SCL
> 100kHz 1.3 –
V
CC
0.4V–
3mA
----------------------------
1000ns
C
b
-------------------

V
CC
0.4V–
3mA
----------------------------
300ns
C
b
----------------