Datasheet

2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 3
ATmega164A/PA/324A/PA/644A/PA/1284/P
Table of Contents
1 Pin configurations ............................................................................................................... 11
1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF for ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P 11
1.2 Pinout - DRQFN for ATmega164A/164PA/324A/324PA ................................. 12
1.3 Pinout - VFBGA for ATmega164A/164PA/324A/324PA.................................. 13
2Overview .................................................................................................................................... 13
2.1 Block diagram.................................................................................................. 14
2.2 Comparison between ATmega164A, ATmega164PA, ATmega324A, ATmega324PA, ATmega644A,
ATmega644PA, ATmega1284 and ATmega1284P
...................................................................................................................................... 15
2.3 Pin Descriptions............................................................................................... 15
3 Resources ................................................................................................................................ 17
4 About code examples ....................................................................................................... 17
5 Data retention ......................................................................................................................... 17
6 Capacitive touch sensing ............................................................................................... 17
7 AVR CPU Core ....................................................................................................................... 18
7.1 Overview.......................................................................................................... 18
7.2 ALU – Arithmetic Logic Unit............................................................................. 19
7.3 Status Register ................................................................................................ 19
7.4 General Purpose Register File ........................................................................ 21
7.5 Stack Pointer ................................................................................................... 22
7.6 Instruction Execution Timing ........................................................................... 23
7.7 Reset and interrupt handling ........................................................................... 24
8 AVR memories ....................................................................................................................... 27
8.1 Overview.......................................................................................................... 27
8.2 In-System Reprogrammable Flash Program Memory ..................................... 27
8.3 SRAM data memory ........................................................................................ 28
8.4 EEPROM data memory ................................................................................... 30
8.5 I/O memory...................................................................................................... 31
8.6 Register Description ........................................................................................ 32
9 System clock and clock options ................................................................................ 38
9.1 Clock systems and their distribution ................................................................ 38
9.2 Clock Sources ................................................................................................. 39