Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 261
• Bit 7, 5:3 – Reserved
These bits are reserved for future use in the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P. For
ensuring compatibility with future devices, these bits must be written zero when ADCSRB is written.
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger an ADC
conversion. If ADATE is cleared, the ADTS[2:0] settings will have no effect. A conversion will be triggered by the
rising edge of the selected Interrupt Flag. Note that switching from a trigger source that is cleared to a trigger
source that is set, will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will start a
conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC
Interrupt Flag is set
.
23.9.5 DIDR0 – Digital Input Disable Register 0
• Bit 7:0 – ADC7D..ADC0D: ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is disabled. The
corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to
the ADC7:0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce
power consumption in the digital input buffer.
Table 23-6. ADC auto trigger source selections
ADTS2 ADTS1 ADTS0 Trigger source
0 0 0 Free Running mode
0 0 1 Analog Comparator
0 1 0 External Interrupt Request 0
0 1 1 Timer/Counter0 Compare Match A
1 0 0 Timer/Counter0 Overflow
1 0 1 Timer/Counter1 Compare Match B
1 1 0 Timer/Counter1 Overflow
1 1 1 Timer/Counter1 Capture Event
Bit 76543210
(0x7E) ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D DIDR0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000