Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 239
• Bit 0 – TWGCE: TWI General Call Recognition Enable Bit
If set, this bit enables the recognition of a General Call given over the two-wire Serial Bus.
21.9.6 TWAMR – TWI (Slave) Address Mask Register
• Bits 7:1 – TWAM: TWI Address Mask
The TWAMR can be loaded with a 7-bit Slave Address mask. Each of the bits in TWAMR can mask (disable)
the corresponding address bit in the TWI Address Register (TWAR). If the mask bit is set to one then the
address match logic ignores the compare between the incoming address bit and the corresponding bit in TWAR.
Figure 21-22 shows the address match logic in detail.
Figure 21-22. TWI address match logic, block diagram
• Bit 0 – Reserved
This bit is reserved and will always read as zero.
Bit 76543210
(0xBD)
TWAM[6:0]
–
TWAMR
Read/Write R/W R/W R/W R/W R/W R/W R/W R
Initial Value00000000
Addre
ss
Match
Address Bit Comparator 0
Address Bit Comparator 6..1
TWAR0
TWAMR0
Address
Bit 0