Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 211
21. Two-wire Serial Interface
21.1 Features
• Simple yet powerful and flexible communication interface, only two bus lines needed
• Both Master and Slave operation supported
• Device can operate as transmitter or receiver
• 7-bit address space allows up to 128 different Slave addresses
• Multi-master arbitration support
• Up to 400kHz data transfer speed
• Slew-rate limited output drivers
• Noise suppression circuitry rejects spikes on bus lines
• Fully programmable Slave address with General Call support
• Address recognition causes wake-up when AVR is in Sleep mode
21.2 Two-wire Serial Interface bus definition
The Two-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The TWI protocol
allows the systems designer to interconnect up to 128 different devices using only two bi-directional bus lines,
one for clock (SCL) and one for data (SDA). The only external hardware needed to implement the bus is a single
pull-up resistor for each of the TWI bus lines. All devices connected to the bus have individual addresses, and
mechanisms for resolving bus contention are inherent in the TWI protocol.
Figure 21-1. TWI bus interconnection
21.2.1 TWI Terminology
The following definitions are frequently encountered in this section.
Device 1
Device 2
Device 3
Device n
SDA
SCL
........
R1 R2
V
CC
Table 21-1. TWI terminology
Term Description
Master
The device that initiates and terminates a transmission. The Master also generates the
SCL clock.
Slave The device addressed by a Master.
Transmitter The device placing data on the bus.
Receiver The device reading data from the bus.