Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 162
Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR2B is written
when operating in PWM mode. When writing a logical one to the FOC2A bit, an immediate Compare Match is
forced on the Waveform Generation unit. The OC2A output is changed according to its COM2A1:0 bits setting.
Note that the FOC2A bit is implemented as a strobe. Therefore it is the value present in the COM2A1:0 bits that
determines the effect of the forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR2A as TOP.
The FOC2A bit is always read as zero.
Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR2B is written
when operating in PWM mode. When writing a logical one to the FOC2B bit, an immediate Compare Match is
forced on the Waveform Generation unit. The OC2B output is changed according to its COM2B1:0 bits setting.
Note that the FOC2B bit is implemented as a strobe. Therefore it is the value present in the COM2B1:0 bits that
determines the effect of the forced compare.
A FOC2B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR2B as TOP.
The FOC2B bit is always read as zero.
Bits 5:4 – Reserved
These bits are reserved and will always read as zero.
Bit 3 – WGM22: Waveform Generation Mode
See the description in the ”TCCR2A – Timer/Counter Control Register A” on page 159.
Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see Table 17-9 on page
162.
17.11.3 TCNT2 – Timer/Counter Register
Table 17-9. Clock Select bit description
CS22 CS21 CS20 Description
0 0 0 No clock source (Timer/Counter stopped).
0 0 1 clk
T2S
/(No prescaling)
0 1 0 clk
T2S
/8 (From prescaler)
0 1 1 clk
T2S
/32 (From prescaler)
1 0 0 clk
T2S
/64 (From prescaler)
1 0 1 clk
T2S
/128 (From prescaler)
1 1 0 clk
T
2
S
/256 (From prescaler)
1 1 1 clk
T
2
S
/1024 (From prescaler)
Bit 76543210
(0xB2) TCNT2[7:0] TCNT2
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000