Datasheet

ATmega164A/PA/324A/PA/644A/PA/1284/P
 2018 Microchip Technology Inc. Data Sheet Complete DS40002070A-page 115
16. 16-bit Timer/Counter1 and Timer/Counter3
(1)
with PWM
Note: 1. Timer/Counter3 is only available in ATmega1284/1284P
16.1 Features
• True 16-bit design (that is, allows 16-bit PWM)
• Two independent Output Compare units
• Double Buffered Output Compare Registers
• One Input Capture unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
16.2 Overview
The 16-bit Timer/Counter unit allows accurate program execution timing (event management), wave generation,
and signal timing measurement.
Most register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, and a lower case “x” replaces the Output Compare unit channel. However, when using
the register or bit defines in a program, the precise form must be used, that is, TCNT1 for accessing
Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 16-1. For the actual placement of I/O
pins, see ”Pin configurations” on page 11. CPU accessible I/O Registers, including I/O bits and I/O pins, are
shown in bold. The device-specific I/O Register and bit locations are listed in the ”Register description” on page
136.
The PRTIM1 bit in ”PRR0 – Power Reduction Register 0” on page 56 must be written to zero to enable
Timer/Counter1 module.