Datasheet

11
ATF196V8B(Q)(QL) [DATASHEET]
Atmel-0364K-PLD-ATF16V8B-8BQ-8BQL-Datasheet_072014
Figure 10-1. Registered Configuration for Registered Mode
(1)(2)
Notes: 1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the registered
outputs. Pin 1 and Pin 11 are permanently configured as CLK and
OE.
2. The development software configures all the architecture control bits and checks for proper pin usage
automatically.
Figure 10-2. Combinatorial Configuration for Registered Mode
(1)(2)
Notes: 1. Pin 1 and Pin 11 are permanently configured as CLK and OE.
2. The development software configures all the architecture control bits and checks for proper pin usage
automatically.
CLK
OE
XOR
DQ
Q
XOR