Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
980
40.5.5.1 Programming Examples
40.5.5.2 Single-buffer Transfer (Row 1)
1. Read the Channel Handler Status Register DMAC_CHSR.ENABLE Field to choose a free (disabled)
channel.
2. Clear any pending interrupts on the channel from the previous DMAC transfer by reading the interrupt status
register, DMAC_EBCISR.
3. Program the following channel registers:
a. Write the starting source address in the DMAC_SADDRx register for channel x.
b. Write the starting destination address in the DMAC_DADDRx register for channel x.
c. Program DMAC_CTRLAx, DMAC_CTRLBx and DMAC_CFGx according to Row 1 as shown in Table
40-2 on page 978. Program the DMAC_CTRLBx register with both DST_DSCR and SRC_DSCR
fields set to one and AUTO field set to 0.
d. Write the control information for the DMAC transfer in the DMAC_CTRLAx and DMAC_CTRLBx reg-
isters for channel x. For example, in the register, you can program the following:
 i. Set up the transfer type (memory or non-memory peripheral for source and destination) and flow
control device by programming the FC of the DMAC_CTRLBx register.
 ii. Set up the transfer characteristics, such as:
– Transfer width for the source in the SRC_WIDTH field.
– Transfer width for the destination in the DST_WIDTH field.
– Source AHB Master interface layer in the SIF field where source resides.
– Destination AHB Master Interface layer in the DIF field where destination resides.
– Incrementing/decrementing or fixed address for source in SRC_INC field.
– Incrementing/decrementing or fixed address for destination in DST_INC field.
e. Write the channel configuration information into the DMAC_CFGx register for channel x.
 i. Designate the handshaking interface type (hardware or software) for the source and destination
peripherals. This is not required for memory. This step requires programming the
SRC_H2SEL/DST_H2SEL bits, respectively. Writing a ‘1’ activates the hardware handshaking
interface to handle source/destination requests. Writing a ‘0’ activates the software handshaking
interface to handle source/destination requests.
 ii. If the hardware handshaking interface is activated for the source or destination peripheral, assign a
handshaking interface to the source and destination peripheral. This requires programming the
SRC_PER and DST_PER bits, respectively.
f. If source picture-in-picture mode is enabled (DMAC_CTRLBx.SRC_PIP is enabled), program the
DMAC_SPIPx register for channel x.
g. If destination picture-in-picture mode is enabled (DMAC_CTRLBx.DST_PIP is enabled), program the
DMAC_DPIPx register for channel x.
4. After the DMAC selected channel has been programmed, enable the channel by writing a ‘1’ to the
DMAC_CHER.ENABLE[n] bit, where n is the channel number. Make sure that bit 0 of DMAC_EN.ENABLE
register is enabled.
5. Source and destination request single and chunk DMAC transactions to transfer the buffer of data (assuming
non-memory peripherals). The DMAC acknowledges at the completion of every transaction (chunk and
single) in the buffer and carry out the buffer transfer.
6. Once the transfer completes, hardware sets the interrupts and disables the channel. At this time you can
either respond to the buffer Complete or Transfer Complete interrupts, or poll for the Channel Handler Status
Register (DMAC_CHSR.ENABLE[n]) bit until it is cleared by hardware, to detect when the transfer is
complete.