Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
942
39.10.3 Interleaved Mode
In the Interleaved Mode, the conversion of the touchscreen channels are made in parallel to each channel. In
addition to interleaving, the analog channels 4 and 5 can be converted more often than the touchscreen channels
depending on the TSFREQ field in the register TSADCC_MR. In the interleaved mode at least one ADC channel
must be enabled.
In the Interleaved Mode, the channels 0 to 3 corresponding to the Touchscreen inputs are automatically activated
and the bits CH0 to CH3 are automatically set in the “TSADCC Channel Status Register” .
This mode allows periodic conversion of the remaining channels at high sampling rate and converted data
transferred in memory with the PDC while the touchscreen conversions are performed at low rate. The PDC
transfers only analog channel data and touchscreen data must be read in the “TSADCC Channel Data Register x
(x = 0..7)” .
The resolution can be configured for the channel 4 to 7 only, through the LOWRES bit. The resolution for the
conversion made on channels 0 to 3 is forced to 10 bits.
At each trigger, the sequence performed depends on a Trigger Counter, which is compared at the end to the
Touchscreen Frequency, as defined by the field TSFREQ in the register TSADCC_MR:
Touchscreen Frequency = Trigger Frequency / (2
TSFREQ+1
)
unless TSFREQ is programmed at 0 or 1. In such cases, the Touchscreen Frequency is one-sixth of the Trigger
Frequency.
As TSFREQ varies between 0 and 15, this results in the ADC channels being converted between 6 to 65536 less
often than the Touchscreen channels.
If the bit PRES in “TSADCC Mode Register” is disabled (measure only position), the sequences are as follow:
 For Trigger Counter at 0:
1. Close the switches on the inputs X
P
and X
M
during the Sample and Hold Time.
2. Convert Channel X
M
and store the result in TSADCC_CDR1.
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corresponding
TSADCC_CDRx and TSADCC_LCDR.
4. Set Trigger Counter to 1.
 For Trigger Counter at 1:
1. Close the switches on the inputs X
P
and X
M
during the Sample and Hold Time.
2. Convert Channel X
P
, subtract TSADCC_CDR1 from the result and store the subtraction result in
TSADCC_CDR0 (and also in TSADCC_LCDR if PDCEN is enabled).
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corresponding
TSADCC_CDRx and TSADCC_LCDR.
4. Set Trigger Counter to 2.
 For Trigger Counter at 2:
1. Close the switches on the inputs X
P
and X
M
during the Sample and Hold Time.
2. Convert Channel Y
P
, subtract TSADCC_CDR1 from the result and store the subtraction result in
TSADCC_CDR1 (and also in TSADCC_LCDR if PDCEN is enabled).
3. If Channel 4 to Channel 7 are enabled, convert Channels and store result in the corresponding
TSADCC_CDRx and TSADCC_LCDR.
4. Set Trigger Counter to 3.