Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
938
Figure 39-6. GOVRE and OVREx Flag Behavior
WARNING: If the corresponding channel is disabled during a conversion or if it is disabled and then reenabled
during a conversion, its associated data and its corresponding EOC and OVRE flags in TSADCC_SR are
unpredictable.
39.9 Conversion Triggers
Conversions of the active analog channels are started with a software or a hardware trigger.
The software trigger is provided by writing the “TSADCC Control Register” with the bit START at 1.
The hardware trigger can be selected by the filed TRGMOD in the TSADCC Trigger Register (TSADCC_TRGR)
between:
 an edge, either rising or falling or any, detected on the external trigger pin TSADTRG
 the Pen Detect, depending on how the PENDET bit is set in the “TSADCC Mode Register”
 a continuous trigger, meaning the TSADCC restarts the next sequence as soon as it finishes the current one,
in this case, only one software trigger is required at the beginning
 a periodic trigger, which is defined by programming the field TRGPER in the “TSADCC Trigger Register”
Enabling hardware triggers does not disable the software trigger functionality. Thus, if a hardware trigger is
selected, the start of a conversion can still be initiated by the software trigger.
EOC0
GOVRE
CH0
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
ADTRG
EOC1
CH1
(ADC_CHSR)
(ADC_SR)
OVRE0
(ADC_SR)
Undefined Data Data A
Data B
ADC_LCDR
Undefined Data
Data A
ADC_CDR0
Undefined Data
Data B
ADC_CDR1
Data C
Data C
Conversion
Read ADC_SR
DRDY
(ADC_SR)
Read ADC_CDR1
Read ADC_CDR0
SHTIM
Conversion
SHTIM
Conversion
SHTIM