Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
846
If the host sends a Zero Length Packet, and the endpoint is free, no data is written in the endpoint, the
RX_BK_RDY flag is set, and the BYTE_COUNT field in UDPHS_EPTSTAx register is null.
The FRCESTALL command bit is unused for an isochonous endpoint.
Otherwise, payload data is written in the endpoint, the RX_BK_RDY interrupt is generated and the BYTE_COUNT
in UDPHS_EPTSTAx register is updated.
37.5.8.5 STALL
STALL is returned by a function in response to an IN token or after the data phase of an OUT or in response to a
PING transaction. STALL indicates that a function is unable to transmit or receive data, or that a control pipe
request is not supported.
 OUT
To stall an endpoint, set the FRCESTALL bit in UDPHS_EPTSETSTAx register and after the STALL_SNT flag has
been set, set the TOGGLE_SEG bit in the UDPHS_EPTCLRSTAx register.
 IN
Set the FRCESTALL bit in UDPHS_EPTSETSTAx register.
Figure 37-16. Stall Handshake Data OUT Transfer
Figure 37-17. Stall Handshake Data IN Transfer
37.5.9 Speed Identification
The high speed reset is managed by the hardware.
At the connection, the host makes a reset which could be a classic reset (full speed) or a high speed reset.
At the end of the reset process (full or high), the ENDRESET interrupt is generated.
Then the CPU should read the SPEED bit in UDPHS_INTSTAx to ascertain the speed mode of the device.
Token OUT
Stall PID
Data OUT
USB Bus
Packets
Cleared by Firmware
Set by Firmware
FRCESTALL
STALL_SNT
Set by Hardware
Interrupt Pending
Cleared by Firmware
Token IN Stall PID
USB Bus
Packets
Cleared by Firmware
Set by Firmware
FRCESTALL
STALL_SNT
Set by Hardware
Cleared by Firmware
Interrupt Pending