Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
844
Figure 37-13. Data OUT Transfer for Endpoint with One Bank
Figure 37-14. Data OUT Transfer for an Endpoint with Two Banks
ACKToken OUTNAKToken OUTACK
Token OUT
Data OUT 1
USB Bus
Packets
RX_BK_RDY
Set by Hardware Cleared by Firmware,
Data Payload Written in FIFO
FIFO (DPR)
Content
Written by UDPHS Device Microcontroller Read
Data OUT 1 Data OUT 1 Data OUT 2
Host Resends the Next Data Payload
Microcontroller Transfers Data
Host Sends Data Payload
Data OUT 2
Data OUT 2
Host Sends the Next Data Payload
Written by UDPHS Device
(UDPHS_EPTSTAx)
Interrupt Pending
Token OUT ACK Data OUT 3Token OUTData OUT 2Token OUTData OUT 1
Data OUT 1
Data OUT 2 Data OUT 2
ACK
Cleared by Firmware
USB Bus
Packets
Virtual RX_BK_RDY
Bank 0
Virtual RX_BK_RDY
Bank 1
Set by Hardware
Data Payload written
in FIFO endpoint bank 1
FIFO (DPR)
Bank 0
Bank 1
Write by UDPHS Device
Write in progress
Read by Microcontroller
Read by Microcontroller
Set by Hardware,
Data payload written
in FIFO endpoint bank 0
Host sends first data payload
Microcontroller reads Data 1 in bank 0,
Host sends second data payload
Microcontroller reads Data 2 in bank 1,
Host sends third data payload
Cleared by Firmware
Write by Hardware
FIFO (DPR)
(UDPHS_EPTSTAx)
Interrupt pending
Interrupt pending
RX_BK_RDY = (virtual bank 0 | virtual bank 1)
Data OUT 1
Data OUT 3