Datasheet

843
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
Bulk OUT or Interrupt OUT: Receiving a Packet Under Application Control (Host to Device)
Algorithm Description for Each Packet:
 The application enables an interrupt on RX_BK_RDY.
 When an interrupt on RX_BK_RDY is received, the application knows that UDPHS_EPTSTAx register
BYTE_COUNT bytes have been received.
 The application reads the BYTE_COUNT bytes from the endpoint.
 The application clears RX_BK_RDY.
Note: If the application does not know the size of the transfer, it may not be a good option to use AUTO_VALID.
Because if a zero-length-packet is received, the RX_BK_RDY is automatically cleared by the
AUTO_VALID hardware and if the endpoint interrupt is triggered, the software will not find its originating
flag when reading the UDPHS_EPTSTAx register.
Algorithm to Fill Several Packets:
 The application enables the interrupts of BUSY_BANK and AUTO_VALID.
 When a BUSY_BANK interrupt is received, the application knows that all banks available for the endpoint
have been filled. Thus, the application can read all banks available.
If the application does not know the size of the receive buffer, instead of using the BUSY_BANK interrupt, the
application must use RX_BK_RDY.
Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
To use the DMA setting, the AUTO_VALID field is mandatory.
See Bulk IN or Interrupt IN: Sending a Buffer Using DMA (Device to Host) for more information.
DMA Configuration Example:
1. First program UDPHS_DMAADDRESSx with the address of the buffer that should be transferred.
2. Enable the interrupt of the DMA in UDPHS_IEN
3. Program the DMA Channelx Control Register:
 Size of buffer to be sent.
 END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered packet data) at the end
of DMA buffer.
 END_BUFFIT: Generate an interrupt when BUFF_COUNT in the UDPHS_DMASTATUSx register
reaches 0.
 END_TR_EN: End of transfer enable, the UDPHS device can put an end to the current DMA transfer,
in case of a short packet.
 END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB packet has been
transferred by the DMA, if the USB transfer ended with a short packet. (Beneficial when the receive
size is unknown.)
 CHANN_ENB: Run and stop at end of buffer.
For OUT transfer, the bank will be automatically cleared by hardware when the application has read all the bytes in
the bank (the bank is empty).
Note: When a zero-length-packet is received, RX_BK_RDY bit in UDPHS_EPTSTAx is cleared automatically by
AUTO_VALID, and the application knows of the end of buffer by the presence of the END_TR_IT.
Note: If the host sends a zero-length packet, and the endpoint is free, then the device sends an ACK. No data is
written in the endpoint, the RX_BY_RDY interrupt is generated, and the BYTE_COUNT field in
UDPHS_EPTSTAx is null.