Datasheet

791
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
35.13 Write Protection Registers
To prevent any single software error that may corrupt HSMCI behavior, the entire HSMCI address space from
address offset 0x000 to 0x00FC can be write-protected by setting the WPEN bit in the “HSMCI Write Protect Mode
Register” (HSMCI_WPMR).
If a write access to anywhere in the HSMCI address space from address offset 0x000 to 0x00FC is detected, then
the WPVS flag in the HSMCI Write Protect Status Register (HSMCI_WPSR) is set and the field WPVSRC
indicates in which register the write access has been attempted.
The WPVS flag is reset by writing the HSMCI_WPMR with the appropriate access key, WPKEY.
The protected registers are:
 “HSMCI Mode Register” on page 794
 “HSMCI Data Timeout Register” on page 796
 “HSMCI SDCard/SDIO Register” on page 797
 “HSMCI Completion Signal Timeout Register” on page 802
 “HSMCI DMA Configuration Register” on page 816
 “HSMCI Configuration Register” on page 817