Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
776
Figure 35-9. Write Functional Flow Diagram
Notes: 1. It is assumed that this command has been correctly sent (see Figure 35-7).
2. This field is also accessible in the HSMCI Block Register (HSMCI_BLKR).
The following flowchart (Figure 35-10) shows how to manage read multiple block and write multiple block transfers
with the DMA Controller. Polling or interrupt method can be used to wait for the end of write according to the
contents of the HSMCI_IMR.
Send SELECT/DESELECT_CARD
command
(1)
to select the card
Send SET_BLOCKLEN command
(1)
Write using DMAC
Send WRITE_SINGLE_BLOCK
command
(1)
Configure the DMA channel X
DMAC_DADDRx = Data Address to write
DMAC_BTSIZE = BlockLength/4
Send WRITE_SINGLE_BLOCK
command
(1)
Read status register HSMCI_SR
Poll the bit
XFRDONE = 0?
Ye s
No
Ye s
No
Read status register HSMCI_SR
Number of words to write = 0 ?
Poll the bit
TXRDY = 0?
HSMCI_TDR = Data to write
Number of words to write =
Number of words to write -1
Ye s
RETURN
No
Ye s
No
Number of words to write = BlockLength/4
DMAC_CHEN[X] = TRUE
Reset theDMAEN bit
HSMCI_DMA &= ~DMAEN
Set the block length (in bytes)
HSMCI_MR |= (BlockLength) <<16)
(2)
Set the block count (if necessary)
HSMCI_BLKR |= (BlockCount << 0)
Set the DMAEN bit
HSMCI_DMA |= DMAEN
Set the block length (in bytes)
HSMCI_BLKR |= (BlockLength << 16)
(2)
RETURN