Datasheet

645
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
32.8.15 USART Manchester Configuration Register
Name: US_MAN
Address: 0xFFF8C050 (0), 0xFFF90050 (1), 0xFFF94050 (2), 0xFFF98050 (3)
Access: Read/Write
• TX_PL: Transmitter Preamble Length
0: The Transmitter Preamble pattern generation is disabled
1–15: The Preamble Length is TX_PL x Bit Period
• TX_PP: Transmitter Preamble Pattern
• TX_MPOL: Transmitter Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
• RX_PL: Receiver Preamble Length
0: The receiver preamble pattern detection is disabled
1–15: The detected preamble length is RX_PL x Bit Period
• RX_PP: Receiver Preamble Pattern detected
• RX_MPOL: Receiver Manchester Polarity
0: Logic Zero is coded as a zero-to-one transition, Logic One is coded as a one-to-zero transition.
1: Logic Zero is coded as a one-to-zero transition, Logic One is coded as a zero-to-one transition.
31 30 29 28 27 26 25 24
–DRIFT1RX_MPOL– – RX_PP
23 22 21 20 19 18 17 16
–––– RX_PL
15 14 13 12 11 10 9 8
– – – TX_MPOL – – TX_PP
76543210
––––
TX_PL
TX_PP Preamble Pattern default polarity assumed (TX_MPOL field not set)
00ALL_ONE
01ALL_ZERO
1 0 ZERO_ONE
11ONE_ZERO
RX_PP Preamble Pattern default polarity assumed (RX_MPOL field not set)
00ALL_ONE
01ALL_ZERO
1 0 ZERO_ONE
11ONE_ZERO