Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
626
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
– If USART does not operate in SPI Mode (USART_MODE is ≠ 0xE and 0xF):
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
– If USART operates in SPI Mode (USART_MODE = 0xE or 0xF):
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
•PAR: Parity Type
• NBSTOP: Number of Stop Bits
• CHMODE: Channel Mode
• MSBF/CPOL: Bit Order or SPI Clock Polarity
– If USART does not operate in SPI Mode (USART_MODE ≠ 0xE and 0xF):
MSBF = 0: Least Significant Bit is sent/received first.
MSBF = 1: Most Significant Bit is sent/received first.
– If USART operates in SPI Mode (Slave or Master, USART_MODE = 0xE or 0xF):
CPOL = 0: The inactive state value of SPCK is logic level zero.
CPOL = 1: The inactive state value of SPCK is logic level one.
CPOL is used to determine the inactive state value of the serial clock (SPCK). It is used with CPHA to produce the required
clock/data relationship between master and slave devices.
PAR Parity Type
000Even parity
001Odd parity
0 1 0 Parity forced to 0 (Space)
0 1 1 Parity forced to 1 (Mark)
10xNo parity
1 1 x Multidrop mode
NBSTOP Asynchronous (SYNC = 0) Synchronous (SYNC = 1)
0 0 1 stop bit 1 stop bit
0 1 1.5 stop bits Reserved
1 0 2 stop bits 2 stop bits
1 1 Reserved Reserved
CHMODE Mode Description
00Normal Mode
0 1 Automatic Echo. Receiver input is connected to the TXD pin.
1 0 Local Loopback. Transmitter output is connected to the Receiver Input.
1 1 Remote Loopback. RXD pin is internally connected to the TXD pin.