Datasheet

521
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
Figure 30-31. Repeated Start + Reversal from Write to Read Mode
Notes: 1. In this case, if TWI_THR has not been written at the end of the read command, the clock is automatically stretched before
the ACK.
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
30.7.5.6 Read Write Flowcharts
The flowchart shown in Figure 30-32 gives an example of read and write operations in Slave mode. A polling or
interrupt method can be used to check the status bits. The interrupt method requires that the interrupt enable
register (TWI_IER) be configured first.
S SADR W ADATA0A DATA 1
SADRSr
A
R A DATA2 A DATA3 N A P
Cleared after read
DATA0
DATA2 DATA3
DATA1
TXCOMP
TXRDY
RXRDY
As soon as a START is detected
Read TWI_RHR
SVACC
SVREAD
TWD
TWI_RHR
TWI_THR
EOSACC