Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
500
30.5 Application Block Diagram
Figure 30-2. Application Block Diagram
30.5.1 I/O Lines Description
30.6 Product Dependencies
30.6.1 I/O Lines
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current source or pull-up
resistor (see Figure 30-2). When the bus is free, both lines are high. The output stages of devices connected to the
bus must have an open-drain or open-collector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer must perform the
following step:
 Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
30.6.2 Power Management
 Enable the peripheral clock.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the programmer must
first configure the PMC to enable the TWI clock.
Host with
TWI
Interface
TWD
TWCK
Atmel TWI
Serial EEPROM
I²C RTC
I²C LCD
Controller
Slave 1 Slave 2 Slave 3
VDD
I²C Temp.
Sensor
Slave 4
Rp: Pull up value as given by the I²C Standard
Rp Rp
Table 30-3. I/O Lines Description
Pin Name Pin Description Type
TWD Two-wire Serial Data Input/Output
TWCK Two-wire Serial Clock Input/Output
Table 30-4. I/O Lines
Instance Signal I/O Line Peripheral
TWI0 TWCK0 PA21 A
TWI0 TWD0 PA20 A
TWI1 TWCK1 PB11 A
TWI1 TWD1 PB10 A