Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
368
26. Advanced Interrupt Controller (AIC)
26.1 Description
The Advanced Interrupt Controller (AIC) is an 8-level priority, individually maskable, vectored interrupt controller,
providing handling of up to thirty-two interrupt sources. It is designed to substantially reduce the software and real-
time overhead in handling internal and external interrupts.
The AIC drives the nFIQ (fast interrupt request) and the nIRQ (standard interrupt request) inputs of an ARM
processor. Inputs of the AIC are either internal peripheral interrupts or external interrupts coming from the
product's pins.
The 8-level Priority Controller allows the user to define the priority for each interrupt source, thus permitting higher
priority interrupts to be serviced even if a lower priority interrupt is being treated.
Internal interrupt sources can be programmed to be level sensitive or edge triggered. External interrupt sources
can be programmed to be positive-edge or negative-edge triggered or high-level or low-level sensitive.
The fast forcing feature redirects any internal or external interrupt source to provide a fast interrupt rather than a
normal interrupt.
26.2 Embedded Characteristics
 Controls the interrupt lines (nIRQ and nFIQ) of the ARM Processor
 Thirty-two individually maskable and vectored interrupt sources
 Source 0 is reserved for the Fast Interrupt Input (FIQ)
 Source 1 is reserved for system peripherals (PIT, RTT, PMC, DBGU, etc.)
 Programmable Edge-triggered or Level-sensitive Internal Sources
 Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
 One External Sources plus the Fast Interrupt signal
 8-level Priority Controller
 Drives the Normal Interrupt of the processor
 Handles priority of the interrupt sources 1 to 31
 Higher priority interrupts can be served during service of lower priority interrupt
 Vectoring
 Optimizes Interrupt Service Routine Branch and Execution
 One 32-bit Vector Register per interrupt source
 Interrupt Vector Register reads the corresponding current Interrupt Vector
 Protect Mode
 Easy debugging by preventing automatic operations when protect modes are enabled
 Fast Forcing
 Permits redirecting any normal interrupt source on the Fast Interrupt of the processor