Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
316
The Peripheral DMA Controller handles transfer requests from the channel according to the following priorities
(Low to High priorities):
Table 23-1. Peripheral DMA Controller
Instance name Channel T/R
DBGU Transmit
USART3 Transmit
USART2 Transmit
USART1 Transmit
USART0 Transmit
AC97C Transmit
SPI1 Transmit
SPI0 Transmit
SSC1 Transmit
SSC0 Transmit
TSADCC Receive
DBGU Receive
USART3 Receive
USART2 Receive
USART1 Receive
USART0 Receive
AC97C Receive
SPI1 Receive
SPI0 Receive
SSC1 Receive
SSC0 Receive