Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
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• EBISHARE: External Bus Interface is Shared
The DDR controller embedded in the EBI is used at the same time as another memory controller (SMC,..)
Reset value is 0.
0: Only the DDR controller function is used.
1: The DDR controller shares the EBI with another memory controller (SMC, NAND,..)
• ACTBST: ACTIVE Bank X to Burst Stop Read Access Bank Y
Reset value is 0.
0: After an ACTIVE command in Bank X, BURST STOP command can be issued to another bank to stop current read
access.
1: After an ACTIVE command in Bank X, BURST STOP command cannot be issued to another bank to stop current read
access.
This field is unique to SDR-SDRAM, Low-power SDR-SDRAM and Low-power DDR1-SDRAM devices.