Datasheet

23
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
6.2 System Controller Block Diagram
Figure 6-1. SAM9G45 System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Real-time
Timer
Periodic
Interval
Timer
Reset
Controller
PA0–PA31
periph_nreset
System Controller
Watchdog
Timer
wdt_fault
WDRPROC
PIO
Controllers
Power
Management
Controller
XIN
XOUT
MAINCK
PLLACK
pit_irq
MCK
proc_nreset
wdt_irq
periph_irq[2..6]
periph_nreset
periph_clk[2..30]
PCK
MCK
pmc_irq
nirq
nfiq
rtt_irq
Embedded
Peripherals
periph_clk[2..6]
pck[0–1]
in
out
enable
ARM926EJ-S
SLCK
SLCK
irq
fiq
irq0–irq2
fiq
periph_irq[6..30]
periph_irq[2..24]
int
int
periph_nreset
periph_clk[6..30]
jtag_nreset
por_ntrst
proc_nreset
periph_nreset
dbgu_txd
dbgu_rxd
pit_irq
dbgu_irq
pmc_irq
rstc_irq
wdt_irq
rstc_irq
SLCK
Boundary Scan
TAP Controller
jtag_nreset
debug
PCK
debug
idle
debug
Bus Matrix
MCK
periph_nreset
proc_nreset
backup_nreset
periph_nreset
idle
Debug
Unit
dbgu_irq
MCK
dbgu_rxd
periph_nreset
dbgu_txd
rtt_alarm
Shutdown
Controller
SLCK
rtt0_alarm
backup_nreset
SHDN
WKUP
4 General-purpose
Backup Registers
backup_nreset
XIN32
XOUT32
PB0–PB31
PC0–PC31
VDDBU Powered
VDDCORE Powered
ntrst
VDDCORE
POR
12 MHz
Main
Oscillator
PLLA
VDDBU
POR
Slow Clock
Oscillator
UPLL
por_ntrst
VDDBU
rtt_irq
UPLLCK
USB High Speed
Device Port
UPLLCK
periph_nreset
periph_irq[24]
RC
Oscillator
PD0–PD31
SCKCR
PE0–PE31
Real-time
Clock
rtc_irq
SLCK
backup_nreset
rtc_alarm
USB High Speed
Host Port
UPLLCK
periph_nreset
periph_irq[25]
UHP48M
UHP12M
UHP48M
UHP12M
DDR sysclk