Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
228
21.2 Embedded Characteristics
 AMBA Compliant Interface, interfaces Directly to the ARM Advanced High performance Bus (AHB)
 Four AHB Interfaces, Management of All Accesses Maximizes Memory Bandwidth and Minimizes
Transaction Latency
 AHB Transfer: Word, Half Word, Byte Access
 Supports DDR2-SDRAM, Low-power DDR1-SDRAM or DDR2-SDRAM, SDR-SDRAM and Low-power
SDR-SDRAM
 Numerous Configurations Supported
 2K, 4K, 8K, 16K Row Address Memory Parts
 SDRAM with Four Internal Banks
 SDR-SDRAM with 16- or 32-bit Data Path
 DDR-SDRAM with 16-bit Data Path
 One Chip Select for SDRAM Device (256 Mbyte Address Space)
 Programming Facilities
 Multibank Ping-pong Access (Up to or 4 Banks Opened at Same Time = Reduces Average Latency of
Transactions)
 Timing Parameters Specified by Software
 Automatic Refresh Operation, Refresh Rate is Programmable
 Automatic Update of DS, TCR and PASR Parameters (Low-power SDRAM Devices)
 Energy-saving Capabilities
 Self-refresh, Power-down, Active Power-down and Deep Power-down Modes Supported
 SDRAM Power-up Initialization by Software
 CAS Latency of 2, 3 Supported
 Reset Function Supported (DDR2-SDRAM)
 ODT (On-die Termination) Not Supported
 Auto Precharge Command Not Used
 SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported
 DDR2-SDRAM with Eight Internal Banks Not Supported
 SDR-SDRAM or Low-power DDR1-SDRAM with 2 Internal Banks Not Supported
 Clock Frequency Change in Precharge Power-down Mode Not Supported
 OCD (Off-chip Driver) Mode Not Supported