Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
220
20.15 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in Table 20-8. For each chip select, a set of 4 registers is used to pro-
gram the parameters of the external device connected on it. In Table 20-8, “CS_number” denotes the chip select number.
16 bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 20-8. Register Mapping
Offset Register Name Access Reset
0x10 x CS_number + 0x00 SMC Setup Register SMC_SETUP Read/Write 0x01010101
0x10 x CS_number + 0x04 SMC Pulse Register SMC_PULSE Read/Write 0x01010101
0x10 x CS_number + 0x08 SMC Cycle Register SMC_CYCLE Read/Write 0x00030003
0x10 x CS_number + 0x0C SMC Mode Register SMC_MODE Read/Write 0x10001000
0xC0 SMC Delay on I/O SMC_DELAY1 Read/Write 0x00000000
0xC4 SMC Delay on I/O SMC_DELAY2 Read/Write 0x00000000
0xC8 SMC Delay on I/O SMC_DELAY3 Read/Write 0x00000000
0xCC SMC Delay on I/O SMC_DELAY4 Read/Write 0x00000000
0xD0 SMC Delay on I/O SMC_DELAY5 Read/Write 0x00000000
0xD4 SMC Delay on I/O SMC_DELAY6 Read/Write 0x00000000
0xD8 SMC Delay on I/O SMC_DELAY7 Read/Write 0x00000000
0xDC SMC Delay on I/O SMC_DELAY8 Read/Write 0x00000000
0xEC–0xFC Reserved – – –