Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
1216
Boot strategies:
Section 11.4.3.1 “NAND Flash Boot”, and Table 11-4, CS0 changed into CS3.
Section 11.4.3.4 “TWI EEPROM Boot” and Table 11-4, TWI, TWD and TWCK changed into TWI0, TWD0
and TWCK0.
6682
DDR/SDR SDRAM Controller (DDRSDRC):
Watermarks removed from Section 22. “DDR/SDR SDRAM Controller (DDRSDRC)”.
rfo
(1)
Electrical Characteristics:
A “Core Power Supply POR Characteristics” section has been added at the end of Section 46.
“SAM9G45 Electrical Characteristics”.
6664
Section 46.8 “PLL Characteristics” , a Startup Time (T) line was added to Table 46-14 and Table 46-16.
2 values were added to Clock Characteristics Table 46-4 and Table 46-5.
6672
The following sections were added: Section 46.13 “SMC Timings”, Section 46.14 “DDRSDRC Timings”,
Section 46.15 “Peripheral Timings”
6637
5 ripple values added to Table 46-2 on page 1139. 6689
Figure 46-5 and Figure 46-6 titles reversed. 6769
Maximum Operating Voltage values edited in Table 46-1 on page 1139.
Table 46-2 on page 1139 updated:
- V
T-
and V
T+
edited; V
HYS
added.
- I
O
ranges edited.
- Isc max value changed into ‘TBD’.
Table 46-17 on page 1148, and Note below, edited.
Section 46.10, I/O Drive Level, removed.
rfo
(1)
External Memories:
Section 20.1.6.1 “2x8-bit DDR2” title changed (was ‘16-bit DDR2’)
Section 20.2.8.2 “16-bit LPDDR on EBI” added
6741
LCD Controller (LCDC):
Section 45.12.12 “LCD Timing Configuration Register 1”, ‘-’ replaced by ‘1’ for bit 31, and ‘Bit 31 must be
written to 1’ added to VHDLY definition.
6685
Parallel Input/Output Controller (PIO):
- DELAY Registers were addded in a Section 30.4.12 “Programmable I/O Delays” and associated register
description added in a Section 30.6.30 “PIO I/O Delay Register”.
- “Write Protected Registers” description added, together with Section 30.6.31 “PIO Write Protect Mode
Register”and Section 30.6.32 “PIO Write Protect Status Register”.
In Section 30.6.11 “PIO Clear Output Data Register”, “P0-P31: Set Output Data” changed into “P0-P31:
Clear Output Data”
All ‘slewrate’ changed into ‘drive’.
All ‘IO’ changed into ‘I/O’.
All Section 30.6 “Parallel Input/Output Controller (PIO) User Interface” headers now start with ‘PIO’ only.
Any extra ‘Controller’ or ‘Controller PIO’ removed.
6715
Static Memory Controller (SMC):
Table 21-5 removed from Section 21.8.6 “Reset Values of Timing Parameters”. Cross-referenced Table
21-8 instead.
6742
Doc. Rev
6438D Comments (Continued)
Change
Request
Ref.