Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
1208
04-Dec-15
Section 35. “High Speed Multimedia Card Interface (HSMCI)” (cont’d)
Section 35.14.3 “HSMCI Data Timeout Register”: added sentence about disabling write protection; updated field
descriptions
Section 35.14.4 “HSMCI SDCard/SDIO Register”: added sentence about disabling write protection; updated field
descriptions
Section 35.14.6 “HSMCI Command Register”: updated field descriptions
Section 35.14.8 “HSMCI Completion Signal Timeout Register”: added sentence about disabling write protection; updated
field descriptions
Section 35.14.16 “HSMCI DMA Configuration Register”: added sentence about disabling write protection; updated
CHKSIZE field descriptio
Section 35.14.18 “HSMCI Write Protect Mode Register”: updated field descriptions
Section 35.14.19 “HSMCI Write Protect Status Register”: updated field descriptions
Section 35.14.20 “HSMCI FIFOx Memory Aperture”: name “HSMCI_FIFO” updated to “HSMCI_FIFOx[x=0..255]”
Section 36. “USB High Speed Host Port (UHPHS)”
Updated Section 36.5.1 “Power Management”
Section 37. “USB High Speed Device Port (UDPHS)”
Deleted three notes below Figure 37-2 “Block Diagram”
Table 37-5 “Register Mapping”: removed UDPHS Name1 Register / UDPHS_IPNAME1, UDPHS Name2 Register /
UDPHS_IPNAME2, and UDPHS Features Register / UDPHS_IPFEATURES; defined offset range 0xE4–0xF8 as
reserved
Deleted three sections “UDPHS Name1 Register”, “UDPHS Name2 Register”, and “UDPHS Features Register”
Section 38. “Image Sensor Interface (ISI)”
Table 38-9 “Register Mapping”: removed reset values from write-only registers; defined offset ranges 0x5C–0xE0 and
0xEC–0xF8 as reserved
Removed reset value from register description sections (reset values provided in Table 38-9 “Register Mapping”)
Section 39. “Touchscreen ADC Controller (TSADCC)”
Updated Section 39.2 “Embedded Characteristics”
Figure 39-1 “TSADCC Block Diagram”: “ADTRG” corrected to “TSADTRG”; “ADVREF” corrected to “TSADVREF”
Table 39-4 “Register Mapping”: reset value 0x0000_0000 added to TSADCC_MSCR and TSADCC_WPMR
Section 39.11.18 “TSADCC Write Protection Mode Register”: updated WPEN bit description; added KEY field description
Section 40. “DMA Controller (DMAC)”
Inserted heading Section 40.3 “DMA Controller Peripheral Connections” and updated text
Removed reset value from register description sections (reset values provided in Table 40-3 “Register Mapping”)
Section 43. “True Random Number Generator (TRNG)”
Removed reset value from Section 43.2.4 “TRNG Interrupt Mask Register”, Section 43.2.5 “TRNG Interrupt Status
Register”, and Section 43.2.6 “TRNG Output Data Register” (reset values provided in Table 43-1 “Register Mapping”)
Section 44. “LCD Controller (LCDC)”
Table 44-16 “Register Mapping”: removed reset value from write-only registers
Removed reset value from register description sections (reset values provided in Table 44-16 “Register Mapping”)
Section 45. “Electrical Characteristics”
Table 45-5 “Processor Clock Waveform Parameters”: added missing footnote
Table 45-22 “External Voltage Reference Input”: “ADVREF” corrected to “TSADVREF”
Section 45.12 “Core Power Supply POR Characteristics”
: transferred power-up and power-down sequences to Section
4.2 “Power Sequ
ence Req
uirements”
Table 50-2. SAM9G45 Datasheet Rev. 6438N Revision History (Continued)
Date Changes