Datasheet

1175
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
Figure 45-12. Min and Max Access Time for SPI Output Signal
Table 45-35. SPI Timings with 1.8V Peripheral Supply
Symbol Parameter Conditions Min Max Unit
SPI
SPCK
SPI Clock
Master Mode
–66MHz
SPI
0
MISO Setup time before SPCK rises 18.0 – ns
SPI
1
MISO Hold time after SPCK rises 0 – ns
SPI
2
SPCK rising to MOSI 0 0.2 ns
SPI
3
MISO Setup time before SPCK falls 17.6 – ns
SPI
4
MISO Hold time after SPCK falls 0 – ns
SPI
5
SPCK falling to MOSI 0 0.7 ns
SPI
6
SPCK falling to MISO
Slave Mode
6.0 18.9 ns
SPI
7
MOSI Setup time before SPCK rises 0.7 – ns
SPI
8
MOSI Hold time after SPCK rises 1.7 – ns
SPI
9
SPCK rising to MISO 5.5 18.7 ns
SPI
10
MOSI Setup time before SPCK falls 0.5 – ns
SPI
11
MOSI Hold time after SPCK falls 1.4 – ns
SPI
12
NPCS0 setup to SPCK rising 17.4 – ns
SPI
13
NPCS0 hold after SPCK falling 15.5 – ns
SPI
14
NPCS0 setup to SPCK falling 17.8 – ns
SPI
15
NPCS0 hold after SPCK rising 15.3 – ns
SPI
16
NPCS0 falling to MISO valid 5.4 17.7 ns
SPCK
MISO
MOSI
SPI
2max
SPI
0
SPI
1
SPI
2min