Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
1160
45.4 Clock Characteristics
45.4.1 Processor Clock Characteristics
Note: 1. For DDR2 usage, there are no limitations to LPDDR, SDRAM and mobile SDRAM.
45.4.2 Master Clock Characteristics
The master clock is the maximum clock at which the system is able to run. It is given by the smallest value of the
internal bus clock and EBI clock.
Note: 1. For DDR2 usage, there are no limitations to LPDDR, SDRAM and mobile SDRAM.
Table 45-4. Power Consumption by Peripheral in Active Mode
Peripheral Consumption Unit
AC97 5.3
µA/MHz
DMA 0.2
EMAC 34.8
HSMCI 25.6
ISI 4.8
LCD 20.4
PIO Controller 2.2
PWM 3.8
SPI 4.7
SSC 6.6
Timer Counter Channels 6.9
TRNG 0.9
TSADC 0.1
TWI 1.3
UDPHS 21.7
UHPHS 53.2
USART 7.2
Table 45-5. Processor Clock Waveform Parameters
Symbol Parameter Conditions Min Max Unit
1/(t
CPPCK
) Processor Clock Frequency
VDDCORE = 0.9V
T
A
= 85°C
125
(1)
400 MHz
Table 45-6. Master Clock Waveform Parameters
Symbol Parameter Conditions Min Max Unit
1/(t
CPMCK
) Master Clock Frequency
VDDCORE = 0.9V
T
A
= 85°C
125
(1)
133 MHz