Datasheet

1109
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
horizontal line. This RGB or Monochrome data is shifted to the LCD driver as consecutive bits via the parallel data
lines.
A TFT single scan display uses up to 24 parallel data lines to shift data to successive horizontal lines one at a time
until the entire frame has been shifted and transferred. The 24 data lines are divided in three bytes that define the
color shade of each color component of each pixel. The LCDD bus is split as LCDD[23:16] for the blue component,
LCDD[15:8] for the green component and LCDD[7:0] for the red component. If the LCD Module has lower color
resolution (fewer bits per color component), only the most significant bits of each component are used.
All these interfaces are shown in Figure 44-8 to Figure 44-12.
Figure 44-8 shows the 24-bit single scan TFT display timing.
Figure 44-9 shows the 4-bit single scan STN display timing for monochrome and color modes.
Figure 44-10 on page 1110 shows the 8-bit single scan STN display timing for monochrome and color modes.
Figure 44-11 on page 1111 shows the 8-bit Dual Scan STN display timing for monochrome and color modes.
Figure 44-12 on page 1112 shows the 16-bit Dual Scan STN display timing for monochrome and color modes.
Figure 44-8. TFT Timing (First Line Expanded View)
Figure 44-9. Single Scan Monochrome and Color 4-bit Panel Timing (First Line Expanded View)
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [24:16]
LCDD [15:8]
LCDD [7:0]
G0
B0
R0
G1
B1
R1
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [3]
LCDD [2]
LCDD [1]
LCDD [0]
P1
P0
P2
P3
P5
P4
P6
P7
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [3]
LCDD [2]
LCDD [1]
LCDD [0]
G0
R0
B0
R1
B1
G1
R2
G2