Datasheet

1107
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
Figure 44-7. TFT Panel Timing (Line Expanded View), CLKMOD = 1
Usually the LCD_FRM rate is about 70 Hz to 75 Hz. It is given by the following equation:
where:
 HOZVAL determines de number of LCDDOTCK cycles per line
 LINEVAL determines the number of LCDHSYNC cycles per frame, according to the expressions shown
below:
In STN Mode:
In monochrome mode, Horizontal_display_size is equal to the number of horizontal pixels. The number_data_lines
is equal to the number of bits of the interface in single scan mode; number_data_lines is equal to half the bits of
the interface in dual scan mode.
In color mode, Horizontal_display_size equals three times the number of horizontal pixels.
In TFT Mode:
The frame rate equation is used first without considering the clock periods added at the end beginning or at the
end of each line to determine, approximately, the LCDDOTCK rate:
With this value, the CLKVAL is fixed, as well as the corresponding LCDDOTCK rate.
Then select VHDLY, HPW and HBP according to the type of LCD used and “Equation 1” on page 1105.
Finally, the frame rate is adjusted to 70–75 Hz with the HFP value:
The line counting is controlled by the read-only field LINECNT of LCDCON1 register. The LINECNT field
decreases by one unit at each falling edge of LCDHSYNC.
VHDLY+1 HBP+1 HPW+1 HFP+VHDLY+2
HOZVAL+1
LCDDOTCK
LCDD
1 PCLK
1/2 PCLK
1/2 PCLK
Line Period
LCDVSYNC
LCDHSYNC
LCDDEN
1
f
LCDVSYNC
----------------------------
VHDLY HPW HBP HOZVAL HFP 4()+ ++ ++
f
LCDDOTCK
-------------------------------------------------------------------------------------------------------------------------


VBP LINEVAL VFP 1+ ++
()
=
HOZVAL
Horizontal_display_size
Number_data_lines
----------------------------------------------------------
1–=
LINEVAL Vertical_display_size 1
–=
HOZVAL Horizontal_display_size 1
–=
LINEVAL Vertical_display_size 1–=
f
lcd_pclk
HOZVAL 5+()f
lcd_vsync
LINEVAL 1+()×()×=
HFP f
LCDDOTCK
1
f
LCDVSYNC
LINEVAL VBP VFP 1+++()×
--------------------------------------------------------------------------------------------------------------
VHDLY HPW HPB HOZVAL 4+ ++ +
()
–×=