Datasheet

1083
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
43. True Random Number Generator (TRNG)
43.1 Description
The True Random Number Generator (TRNG) passes the American NIST Special Publication 800-22 and Diehard
Random Tests Suites.
As soon as the TRNG is enabled (TRNG_CTRL register), the generator provides one 32-bit value every 84 clock
cycles. Interrupt trng_int can be enabled through the TRNG_IER (respectively disabled in TRNG_IDR). This
interrupt is set when a new random value is available and is cleared when the status register is read (TRNG_SR).
The flag DATRDY of the status register (TRNG_ISR) is set when the random data is ready to be read out on the
32-bit output data register (TRNG_ODATA).
The normal mode of operation checks that the status register flag equals 1 before reading the output data register
when a 32-bit random value is required by the software application.
Figure 43-1. TRNG Data Generation Sequence
84 clock cycles
84 clock cycles
84 clock cycles
Read TRNG_ISR
Read TRNG_ODATA
Read TRNG_ISR
Read TRNG_ODATA
clock
trng_int
trng_cr
enable