Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
1032
Figure 41-6. Synchronized Period or Duty Cycle Update
To prevent overwriting the PWM_CUPDx by software, the user can use status events in order to synchronize his
software. Two methods are possible. In both, the user must enable the dedicated interrupt in PWM_IER at PWM
Controller level.
The first method (polling method) consists of reading the relevant status bit in PWM_ISR according to the enabled
channel(s). See Figure 41-7.
The second method uses an Interrupt Service Routine associated with the PWM channel.
Note: Reading the PWM_ISR automatically clears CHIDx flags.
Figure 41-7. Polling Method
Note: Polarity and alignment can be modified only when the channel is disabled.
41.6.3.4 Interrupts
Depending on the interrupt mask in the PWM_IMR, an interrupt is generated at the end of the corresponding
channel period. The interrupt remains active until a read operation in the PWM_ISR occurs.
A channel interrupt is enabled by setting the corresponding bit in the PWM_IER. A channel interrupt is disabled by
setting the corresponding bit in the PWM_IDR.
PWM_CUPDx Value
PWM_CPRDx PWM_CDTYx
End of
Cycle
PWM_CMRx. CPD
User's
Writing
1
0
Writing in PWM_CUPDx
The last write has been taken into account
CHIDx = 1
Writing in CPD field
Update of the Period or Duty Cycle
PWM_ISR Read
Acknowledgement and clear previous register state
YES