Datasheet

SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
1028
41.6.2.2 Waveform Properties
The different properties of output waveforms are:
 the internal clock selection. The internal channel counter is clocked by one of the clocks provided by the
clock generator described in the previous section. This channel parameter is defined in the CPRE field of the
PWM_CMRx register. This field is reset at 0.
 the waveform period. This channel parameter is defined in the CPRD field of the PWM_CPRDx register.
- If the waveform is left aligned, then the output waveform period depends on the counter source clock and
can be calculated:
By using the Master Clock (MCK) divided by an X given prescaler value
(with X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024), the resulting period formula will be:
By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
or
If the waveform is center aligned then the output waveform period depends on the counter source clock and
can be calculated:
By using the Master Clock (MCK) divided by an X given prescaler value
(with X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula will be:
By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes, respectively:
or
 the waveform duty cycle. This channel parameter is defined in the CDTY field of the PWM_CDTYx
register.
If the waveform is left aligned then:
If the waveform is center aligned, then:
 the waveform polarity. At the beginning of the period, the signal can be at high or low level. This property is
defined in the CPOL field of the PWM_CMRx register. By default the signal starts by a low level.
 the waveform alignment. The output waveform can be left or center aligned. Center aligned waveforms can
be used to generate non overlapped waveforms. This property is defined in the CALG field of the
PWM_CMRx register. The default mode is left aligned.
XCPRD×()
MCK
-------------------------------
X*CPRD*DIVA()
MCK
-----------------------------------------------
X*CPRD*DIVB()
MCK
-----------------------------------------------
2 XCPRD××()
MCK
----------------------------------------
2*X*CPRD*DIVA()
MCK
------------------------------------------------------
2*X*CPRD*DIVB()
MCK
------------------------------------------------------
duty cycle
period 1 fchannel_x_clock CDTY×⁄–()
period
----------------------------------------------------------------------------------------------------
=
duty cycle
period 2⁄()1 fchannel_x_clock CDTY×⁄–())
period 2⁄()
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=