Datasheet

1015
SAM9G45 [DATASHEET]
Atmel-6438O-ATARM-SAM9G45-Datasheet_08-Dec-15
40.7.16 DMAC Channel x [x = 0..7] Control A Register
Name: DMAC_CTRLAx [x = 0..7]
Address: 0xFFFFEC48 [0], 0xFFFFEC70 [1], 0xFFFFEC98 [2], 0xFFFFECC0 [3], 0xFFFFECE8 [4], 0xFFFFED10 [5],
0xFFFFED38 [6], 0xFFFFED60 [7]
Access: Read/Write
•BTSIZE
Buffer Transfer Size. The transfer size relates to the number of transfers to be performed, that is, for writes it refers to the
number of source width transfers to perform when DMAC is flow controller. For Reads, BTSIZE refers to the number of
transfers completed on the Source Interface. When this field is set to 0, the DMAC module is automatically disabled when
the relevant channel is enabled.
•SCSIZE
Source Chunk Transfer Size.
31 30 29 28 27 26 25 24
DONE – DST_WIDTH – – SRC_WIDTH
23 22 21 20 19 18 17 16
– DCSIZE – SCSIZE
15 14 13 12 11 10 9 8
BTSIZE
76543210
BTSIZE
SCSIZE value Number of data transferred
000 1
001 4
010 8
011 16
100 32
101 64
110 128
111 256